This invention relates, in general, to semiconductor devices, and more particularly, to a method of making fusible links on integrated circuit devices.
Memory elements are used in integrated circuit memory devices, such as Programmable Array Logic devices (PAL's), Programmable Logic Array devices (PLA's), or Programmable Read Only Memories (PROM's) to produce field programmable products. Memory elements can be horizontal, metallic, fusible links; transistors which are shorted when sufficient reverse current is supplied; or floating gate transistors which can be turned on and off by introducing and releasing charge on the gate.
Metallic fusible links are typically employed in high performance applications using bipolar/BICMOS technologies. In a memory array, a transistor supplies sufficient current to blow the fusible link to create an open circuit between a selected pair of bit and word lines. Fusible links remain intact to represent one logic state, and are fused open to represent the opposite logic state. The amount of energy required for fusing open a fusible link is determined primarily by the fusible link cross-sectional area in the fusing portion. Other parameters which affect the amount of energy required for fusing are the resistivity, thermal conductivity, and melting temperature of the fusible link material.
In the past, fusible links have been fabricated by using a thin, horizontal, conductive or semiconductive film of either polysilicon, nickel chrome, platinum silicide, or titanium tungsten. A disadvantage of fabricating the fusible links in this manner is that a high fusing power is required for fusing. This means that larger transistors and diodes must be provided to handle the larger currents. The fusing power required can not be significantly reduced because a reduction of the fusible link cross-sectional area is limited. The thickness of the fusible link material is typically on the order of 1000 angstroms. The width of the link is on the order of 2 microns and can not be reduced due to photolithography constraints. Thus, there is a need to provide a means of fabricating a fusible link having a smaller cross-sectional area than can be defined by the method described above. A fusible link having a smaller cross-sectional area will require a lower fusing power. Smaller transistors and diodes can be used, thereby reducing the die size of the integrated circuit memory device.
Another disadvantage of the fusible links made in the past is that a defect in the fusible link may cause the link to be open. Thus, there is also a need to provide a fusible link having a built-in redundancy. Built-in redundancy would provide two separate fusible portions in one fusible link element, so that if there is a defective portion on the fusible link, an intact fuse state is still formed.
By now, it should be appreciated that it would be advantageous to provide an improved fusible link requiring lower fusing power and a built-in redundancy.
Accordingly, it is an object of the present invention to provide a method of fabricating a fusible link having a small cross-sectional area, thus requiring low fusing power.
Another object of the present invention is to provide method of fabricating a fusible link which is compatible with modern bipolar and BICMOS processes.
An additional object of the present invention is to provide a fusible link having a built-in redundancy by fabricating the fusible link with two fusible portions.
A further object of the present invention is to increase the packing density of fusible links on an integrated circuit area.